《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》本书讲述的是采用了一个MIPS处理器来展示计算机硬件技术、流水线、存储器的层次结构以及I／O等基本功能。此外，该书还包括一些关于x86架构的介绍。

图书信息

内容简介

导语:

作者简介

图书目录

图书信息

书 名: 计算机组成与设计:硬件 /软件接口

作　者：帕特森(DavidA.Patterson)

出版社： 机械工业出版社

出版时间： 2010年4月1日

ISBN: 9787111302889

开本： 16开

定价: 95.00元

内容简介

这本最畅销的计算机组成书籍经过全面更新，关注现今发生在计算机体系结构领域的革命性变革：从单处理器发展到多核微处理器。此外，出版这本书的ARM版是为了强调嵌入式系统对于全亚洲计算行业的重要性，并采用ARM处理器来讨论实际计算机的指令集和算术运算。因为ARM是用于嵌入式设备的最流行的指令集架构，而全世界每年约销售40亿个嵌入式设备。

采用ARMv6（ARM 11系列）为主要架构来展示指令系统和计算机算术运算的基本功能。

覆盖从串行计算到并行计算的革命性变革，新增了关于并行化的一章，并且每章中还有一些强调并行硬件和软件主题的小节。

新增一个由NVIDIA的首席科学家和架构主管撰写的附录，介绍了现代GPU的出现和重要性，首次详细描述了这个针对可视计算进行了优化的高度并行化、多线程、多核的处理器。

描述一种度量多核性能的独特方法——“Roofline model”，自带benchmark测试和分析AMD Opteron X4、Intel Xeo 5000、Sun Ultra SPARC T2和IBM Cell的性能。

涵盖了一些关于闪存和虚拟机的新内容。提供了大量富有启发性的练习题，内容达200多页。

将AMD Opteron X4和Intel Nehalem作为贯穿《计算机组成与设计:硬件/软件接口(英文版·第4版·ARM版)》的实例。

用SPEC CPU2006组件更新了所有处理器性能实例。

导语:

本版特别之处在于采用ARM取代了早先使用MIPS作为核心处理器来讲述计算机设计的基本原则，为本书增加了另一个层面的内涵。ARM作为嵌入式领域的主流处理器，在嵌入式计算领域具有非常重要的意义。本书弥补了现有数学体系中的空白，即有针对性地向学习嵌入式系统的学生讲授计算机组成的基本原理。同以往版本一样，本书仍主要介绍计算机硬件/软件接口，并巧妙地将其与嵌入式系统设计的基本知识相联系。

作者简介

David A.Patterson，加州大学伯克利分校计算机科学系教授。美国国家工程研究院院士。IEEE和ACM会士。曾因成功的启发式教育方法被IEEE授予James H.Mulligan，Jr教育奖章。他因为对RISC技术的贡献而荣获1 995年IEEE技术成就奖，而在RAID技术方面的成就为他赢得了1999年IEEE Reynold Johnson信息存储奖。2000年他~13John L.Hennessy分享了John von Neumann奖。

John L.Hennessy，斯坦福大学校长，IEEE和ACM会士。美国国家工程研究院院士及美国科学艺术研究院院士。Hennessy教授因为在RISC技术方面做出了突出贡献而荣获2001年的Eckert-Mauchly奖章.他也是2001年Seymour Cray计算机工程奖得主。并且和David A.Patterson分享了2000年John von Neumann奖。

图书目录

1 Computer Abstractions and Technology

1.1 Introduction

1.2 BelowYour Program

1.3 Under the Covers

1.4 Performance

1.5 The Power Wall

1.6 The Sea Change: The Switch from Uniprocessors to Multiprocessors

1.7 Real Stuff: Manufacturing and Benchmarking the AMD Opteron X4

1.8 Fallacies and Pitfalls

1.9 Concluding Remarks

1.10 Historical Perspective and Further Reading

1.11 Exercises

2 Instructions: Language of the Computer

2.1 Introduction

2.2 Operations of the Computer Hardware

2.3 Operands of the Computer Hardware

2.4 Signed and Unsigned Numbers

2.5 Representing Instructions in the Computer

2.6 Logical Operations

2.7 Instructions for Making Decisions

2.8 Supporting Procedures in Computer Hardware

2.9 Communicating with People

2.10 ARM Addressing for 32-Bit Immediates and More Complex Addressing Modes

2.11 Parallelism and Instructions: Synchronization

2.12 Translating and Starting a Program

2.13 A C Sort Example to Put lt AU Together

2.14 Arrays versus Pointers

2.15 Advanced Material: Compiling C and Interpreting Java

2.16 Real Stuff." MIPS Instructions

2.17 Real Stuff: x86 Instructions

2.18 Fallacies and Pitfalls

2.19 Conduding Remarks

2.20 Historical Perspective and Further Reading

2.21 Exercises

3 Arithmetic for Computers

3.1 Introduction

3.2 Addition and Subtraction

3.3 Multiplication

3.4 Division

3.5 Floating Point

3.6 Parallelism and Computer Arithmetic: Associativity

3.7 Real Stuff: Floating Point in the x86

3.8 Fallacies and Pitfalls

3.9 Concluding Remarks

3.10 Historical Perspective and Further Reading

3.11 Exercises

4 The Processor

4.1 Introduction

4.2 Logic Design Conventions

4.3 Building a Datapath

4.4 A Simple Implementation Scheme

4.5 An Overview of Pipelining

4.6 Pipelined Datapath and Control

4.7 Data Hazards: Forwarding versus Stalling

4.8 Control Hazards

4.9 Exceptions

4.10 Parallelism and Advanced Instruction-Level Parallelism

4.11 Real Stuff: theAMD OpteronX4 （Barcelona） Pipeline

4.12 Advanced Topic: an Introduction to Digital Design Using a Hardware Design Language to Describe and Model a Pipelineand More Pipelining Illustrations

4.13 Fallacies and Pitfalls

4.14 Concluding Remarks

4.15 Historical Perspective and Further Reading

4.16 Exercises

5 Large and Fast: Exploiting Memory Hierarchy

5.1 Introduction

5.2 The Basics of Caches

5.3 Measuring and Improving Cache Performance

5.4 Virtual Memory

5.5 A Common Framework for Memory Hierarchies

5.6 Virtual Machines

5.7 Using a Finite-State Machine to Control a Simple Cache

5.8 Parallelism and Memory Hierarchies: Cache Coherence

5.9 Advanced Material: Implementing Cache Controllers

5.10 Real Stuff: the AMD Opteron X4 （Barcelona） and Intel NehalemMemory Hierarchies

5.11 Fallacies and Pitfalls

5.12 Concluding Remarks

5.13 Historical Perspective and Further Reading

5.14 Exercises

6 Storage and Other I/0 Topics

6.1 Introduction

6.2 Dependability, Reliability, and Availability

6.3 Disk Storage

6.4 Flash Storage

6.5 Connecting Processors, Memory, and I/O Devices

6.6 Interfacing I/O Devices to the Processor, Memory, andOperating System

6.7 I/O Performance Measures: Examples from Disk and File Systems

6.8 Designing an I/O System

6.9 Parallelism and I/O: Redundant Arrays of Inexpensive Disks

6.10 Real Stuff: Sun Fire x4150 Server

6.11 Advanced Topics: Networks

6.12 Fallacies and Pitfalls

6.13 Concluding Remarks

6.14 Historical Perspective and Further Reading

6.15 Exercises

7 Multicores, Multiprocessors, and Clusters

7.1 Introduction

7.2 The Difficulty of Creating Parallel Processing Programs

7.3 Shared Memory Multiprocessors

7.4 Clusters and Other Message-Passing Multiprocessors

7.5 Hardware Multithreading 63

7.6 SISD,MIMD，SIMD，SPMD，and Vector

7.7 Introduction to Graphics Processing Units

7.8 Introduction to Multiprocessor Network Topologies

7.9 Multiprocessor Benchmarks

7.10 Roofline：A Simple Performance Model

7.11 Real Stuff：Benchmarking Four Multicores Using theRooflineMudd

7.12 Fallacies and Pitfalls

7.13 Concluding Remarks

7.14 Historical Perspective and Further Reading

7.15 Exercises

Inuex

C D-ROM CONTENT

A Graphics and Computing GPUS

A.1 Introduction

A.2 GPU System Architectures

A.3 Scalable Parallelism-Programming GPUS

A.4 Multithreaded Multiprocessor Architecture

A.5 Paralld Memory System G.6 Floating Point

A.6 Floating Point Arithmetic

A.7 Real Stuff：The NVIDIA GeForce 8800

A.8 Real Stuff：MappingApplications to GPUs

A.9 Fallacies and PitflaUs

A.10 Conduding Remarks

A.1l HistoricalPerspectiveandFurtherReading

B1 ARM and Thumb Assembler Instructions

B1.1 Using This Appendix

B1.2 Syntax

B1.3 Alphabetical List ofARM and Thumb Instructions

B1.4 ARM Asembler Quick Reference

B1.5 GNU Assembler Quick Reference

B2 ARM and Thumb Instruction Encodings

B3 Intruction Cycle Timings

C The Basics of Logic Design

D Mapping Control to Hardware

ADVANCED CONTENT

HISTORICAL PERSPECTIVES & FURTHER READING

TUTORIALS

SOFTWARE